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Patent AT-E400019-T1: [Translated] MANAGEMENT OF ROUTING AND FORWARDING TABLES FOR NETWORK PROCESSOR ARCHITECTURES

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Updated Oct 29, 2026

About this dataset

A computer system having a network processor comprising a core processor and at least one microengine in operative communication with the core processor is provided. A table comprised of a plurality of entries with IP addresses associated therewith is built, wherein the entries are organized hierarchically according to an LC-Trie compression algorithm operating on the IP addresses. An Information packet is received within the computer system, wherein the information packet has a destination IP address associated therewith. The table is searched using an LC-Trie search algorithm to find a match between an IP address of an entry in the table and the destination IP address of the information packet. The information packet is transmitted to a forwarding IP address associated with the IP address of the matching entry. An interface is provided to accommodate communication between the core processor and microengine of the network processor.

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    Official Data Source

    Access the complete Patent AT-E400019-T1: [Translated] MANAGEMENT OF ROUTING AND FORWARDING TABLES FOR NETWORK PROCESSOR ARCHITECTURES on the official website.

    Modified Apr 29, 2026

Prototype by Datopian · not an official government website · data from data.virginia.gov